1. Field of the Invention
The present invention relates in general to electronic devices, and more specifically to a high speed output driver with internal AC-coupled level shift and DC level detection and correction.
2. Description of the Related Art
Process technologies, including CMOS processes, are continually improving resulting in smaller and faster devices, such as, for example, 90-nm (nanometer) CMOS. Yet many systems include circuitry designed with a variety of technologies operating at multiple voltage levels. There exists the need for high-speed, point-to-point interface communications between lower chip level signals, e.g., 1 Volt (V), and external circuits operating at higher voltage levels (e.g., 2.5V, 3.3V, etc). Current Input/Output (I/O) architectures rely on higher voltage, thick gate-oxide devices (e.g., Dual-Gate Oxide (DGO) devices and the like) to implement output drivers for safe operation, yet such drivers suffer from low performance particularly at lower voltage levels of the chip. The process provides thin gate-oxide devices, which are smaller and significantly faster yet unable to withstand the higher voltage levels. The conventional approach is to construct output buffers with a combination of thin gate-oxide (hereinafter “thin-gate”) and thick gate-oxide (hereinafter “thick-gate”) devices in an attempt to achieve a desired level of performance while isolating the thin-gate devices from external supply voltages. It has proved to be very challenging to provide an output buffer that interfaces multiple voltage levels while operating at the desired limits of the I/O speed.
It is appreciated that the terms “thin” and “thick” are relative and that the actual thicknesses depend on the particular process technology and voltage levels employed. As used herein, the term “thin-gate” refers to thin gate-oxide devices that are suitable for the lower voltage ranges but that would break down if exposed to higher voltage levels. The term “thick-gate” refers to thick gate-oxide devices that are capable of being exposed to the higher voltage ranges. In the more specific embodiments illustrated herein, the lower voltage range is up to 1.2 V whereas the higher or full voltage range is between ground (0 V) and 3.3–3.6 V. It is understood, however, that the particular voltage levels and values are arbitrary and may change over time, such that what is now called “thin” may be considered “thick” by tomorrow's standards. The present invention transcends the particular voltage levels and ranges in that the configuration allows the lower voltage or thin-gate devices to be used to switch higher voltage levels which would otherwise require higher voltage devices.
It is desired to implement a high speed output buffer between lower level chip voltages and higher voltage peripheral components and circuits.